ASML: The Ultimate Bottleneck Of The AI Age
The bottleneck that powers the boom
Artificial intelligence is devouring compute at a historic pace, and every additional flop starts with a pattern written in light. That simple fact routes the entire industry through one company’s factory gates. ASML is the sole supplier of extreme ultraviolet lithography, the toolset that unlocks the most advanced logic and memory nodes. In a market where many great companies compete, this is a true choke point. If you believe the world will train larger models and deploy denser inference, then you are implicitly long the wavelength of 13.5 nanometers and the Dutch engineers who learned to tame it.
Look under the hood of today’s leading nodes and you find EUV everywhere. ASML’s 0.33 NA EUV systems, the NXE platform, are used in high volume manufacturing of 7 nm, 5 nm and 3 nm logic and in critical layers for advanced DRAM. There are other lithography tools for older nodes, but there is only one path into the true frontier of performance per watt. That path runs through Veldhoven.
EUV: the irreplaceable gate to smaller transistors
What makes EUV so singular is not just a shorter wavelength. It is an orchestration of improbable physics at industrial scale. A high power CO₂ laser strikes a stream of molten tin droplets to create a plasma that emits 13.5 nm light, which then bounces across a cathedral of Zeiss mirrors inside a vacuum chamber before it ever touches a wafer. The engineering required to do this at 50,000 shots per second, shift after shift, week after week, is why there is one vendor and why that vendor has a moat measured in decades.
That orchestration depends on an ecosystem ASML helped assemble and, in key places, vertically integrate. Zeiss SMT’s mirror system took more than 25 years and billions of euros to perfect. TRUMPF provides the drive laser that makes the light. ASML acquired Cymer to bring the EUV light source inside the tent and built EUV pellicle know-how that is only now being transferred to partners. You cannot replicate that supply chain with a budget or a slogan. You need time, scars, and a coalition of European, American and Asian specialist firms that already picked a side.
High-NA EUV: the next gear for a world that needs more bits
If EUV was the entry ticket, High-NA EUV is the front row seat. Intel took delivery of the first High-NA scanner at its D1X site in Oregon, where it is being brought up for future nodes. These tools are the size of a bus, weigh as much as a whale, and exist for a single purpose: pack more transistors into the same area with better image contrast and fewer masks. It is the cleanest lever the industry has left to keep density marching forward without blowing up cost and cycle time.
High-NA is also where the bottleneck tightens. Each unit is a national asset with an approximate price tag near 350 million euros, which means capacity ramps are intrinsically gated by ASML’s throughput and a handful of upstream partners. Reuters has reported the second High-NA shipment and a double digit order book. ASML itself recorded revenue on two High-NA systems in 2024 and shipped a third by year-end, proof that the platform has crossed from promise to product. In a gold rush, selling picks and shovels is good business. When only one company sells the shovels the pricing power is better.
AI’s two hungry engines: logic and memory
Every breakthrough model drives demand for next generation logic, but the memory side of the house is equally ravenous. HBM3E and the coming HBM4 generations ride on cutting edge DRAM nodes that increasingly deploy EUV on critical layers. Applied Materials notes that the latest HBM generations use EUV and face new stochastic challenges that only arise at these wavelengths. Translation for investors and operators is straightforward. As AI shifts the mix toward HBM, more of the memory tool budget flows through EUV, and therefore through ASML.
The trend is not theoretical. SK hynix started mass producing 1a-class DRAM with EUV several generations ago, while other memory makers have announced EUV-based nodes and roadmaps that align with their HBM ramps. The clearest signal is where capital is going and what is being sampled. Even as process flows diverge across companies, the center of gravity in high performance DRAM has moved toward EUV, and that pulls service, spares and upgrades into ASML’s installed base flywheel.
Order book, installed base, and a long runway
You do not need to extrapolate far to see the operating leverage. In Q3 2025 ASML posted €7.5 billion of total net sales with a 51.6 percent gross margin, guided to a strong Q4, and reiterated double digit full-year growth. EUV made up the bulk of net bookings for the quarter, which tells you where the spend is coming back first as AI demand spills from GPUs into the broader supply chain. Profits at this scale fund the next wave of R&D and capacity for the next wave of tools.
The other engine is the installed base. In 2024, service and field option sales rose more than 15 percent year over year to €6.5 billion. ASML recognized revenue on 44 EUV systems that year, including the first two High-NA units, and highlighted that growth in 2025 would again be supported by installed base management as utilization rises. Recurring euros from a growing fleet of irreplaceable tools is exactly the cash flow mix you want when end markets are cyclical but secular demand is compounding.
Geopolitics that route demand back to Veldhoven
Export controls have tightened over the past two years and they matter. The United States, the Netherlands and Japan have progressively extended restrictions that limit which tools can be shipped to certain fabs in China and in some cases which tools can be serviced. ASML has consistently said it will comply with all regulations and that it expects the net impact to fit within its outlook, a function of diversified demand for logic and memory and a product mix shift toward leading edge. When the rules move, capacity planning shifts with them, but the world still needs the same flops and the same bits, so orders show up in different postcodes.
There is a second order effect that is easy to miss. Controls on advanced accelerators and on advanced HBM push more countries to invest in domestic foundry and memory capacity across allied jurisdictions. That spending lands in places where EUV is allowed to ship on schedule, which concentrates demand even more tightly around ASML’s most advanced platforms. Think of it as geopolitical demand smoothing. The location may change, the wavelength does not.
A moat built from molecules, mirrors, and lasers
ASML’s advantage is not a single patent or a short list of features. It is a living system. Zeiss’s 0.55 NA mirror trains, TRUMPF’s drive lasers, the tin droplet physics, resist innovation from Japanese and European chemistry leaders, and ASML’s own pellicle and source integration create a mesh that no one else has replicated. Even new entrants focused on EUV subsystems are years away from production-grade performance. The task is not just to build a component. It is to make it work every minute of every day inside a scanner that must print with single digit nanometer precision.
This network effect now compounds through software and services. Each new node teaches the fleet. Every upgrade kit that boosts throughput or overlay on a 3600D or 3800E ripples across installed lines and frees capacity without a greenfield build. Value accrues twice, first to chipmakers who monetize more wafers per day, then to ASML through service revenue and higher performance tiers on future systems. This is the definition of a high switching cost market, and it only gets stickier as High-NA locks in process flows for the next decade.
Risks, reality, and why the cycle still favors ASML
Near term, customers will sequence capex, some will defer High-NA adoption, and export policy will continue to evolve. None of that changes the math of AI scaling. The models are getting larger, the inference endpoints more numerous, and every meaningful reduction in energy per operation or memory bandwidth per package requires patterning feats that only EUV can deliver at scale. ASML’s Q3 2025 bookings mix, its 2024 recognition of the first High-NA systems, and the industry’s roadmap for more EUV layers in both logic and DRAM all rhyme with that thesis.
The right way to think about risk here is to ask if any other company can deliver an EUV scanner, with mirrors from Zeiss, a TRUMPF-class drive laser, a production-grade source, qualified pellicles, and a full stack of applications software, then support it in the field for decades. The world has tried. The answer is still no. Even as competitors grow in metrology, deposition, and etch, they do not replace the gatekeeper. They orbit it.
What hypergrowth looks like when you control the gate
The secular runway is visible in ASML’s own long-term materials. Management has mapped scenarios to 2030 that imply higher EUV intensity per wafer in advanced logic and DRAM, with revenue potential that climbs well beyond today’s base. That is not optimism without grounding. It is a distillation of customer roadmaps, subsidy fueled fab plans across multiple regions, and the brute force demands of AI for bandwidth and compute. When you own the only machine that turns those roadmaps into masks and wafers, your destiny is tied to a rising tide.
High-NA is the accelerant. Intel already has the first tool in place for bring-up. Reuters has tracked subsequent shipments and a growing queue. Imec and ASML stood up a High-NA lab to help the ecosystem ramp faster. This is what a bottleneck looks like when it scales responsibly. It invests ahead of demand, shares risk with partners, and pulls the entire industry through the next node. If you believe AI is the biggest compute buildout in history, then it follows that the company selling the only keys to the smallest transistors is sitting at the most valuable junction in technology.


The EUV lithography constraint extends all the way to memory manufacturng. HBM stacks need the tightest process nodes for their logic die componenets. SK Hynix and Samsung both rely on ASML's tools to push density in those layers. Its fascinating how one company controls such a crtiical chokepoint.
Thanks for writing this, it clarifies a lot. I wonder if this bottleneck was touched on in your earlier peice about global chip infrastructure?